Move source tree closer to the 2.6.32.17 mainline
/arch/xtensa/include/asm/cache.h
blob:f04c9891142fa7a5090d966ac4779b0af419ebca -> blob:ed8cd3cbd4993de9619f1e6db12af3c26b166c9b
--- arch/xtensa/include/asm/cache.h
+++ arch/xtensa/include/asm/cache.h
@@ -29,5 +29,6 @@
# define CACHE_WAY_SIZE ICACHE_WAY_SIZE
#endif
+#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
#endif /* _XTENSA_CACHE_H */