Updated to 2.6.32.27
/drivers/clocksource/sh_tmu.c
blob:c0732466fb8749a5a5f81d67e3e5245b48eb3227 -> blob:961f5b5ef6a3584c558c45dbe20a05074fe325b1
--- drivers/clocksource/sh_tmu.c
+++ drivers/clocksource/sh_tmu.c
@@ -199,8 +199,16 @@ static cycle_t sh_tmu_clocksource_read(s
static int sh_tmu_clocksource_enable(struct clocksource *cs)
{
struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
+ int ret;
- return sh_tmu_enable(p);
+ ret = sh_tmu_enable(p);
+ if (ret)
+ return ret;
+
+ /* TODO: calculate good shift from rate and counter bit width */
+ cs->shift = 10;
+ cs->mult = clocksource_hz2mult(p->rate, cs->shift);
+ return 0;
}
static void sh_tmu_clocksource_disable(struct clocksource *cs)
@@ -220,16 +228,6 @@ static int sh_tmu_register_clocksource(s
cs->disable = sh_tmu_clocksource_disable;
cs->mask = CLOCKSOURCE_MASK(32);
cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
-
- /* clk_get_rate() needs an enabled clock */
- clk_enable(p->clk);
- /* channel will be configured at parent clock / 4 */
- p->rate = clk_get_rate(p->clk) / 4;
- clk_disable(p->clk);
- /* TODO: calculate good shift from rate and counter bit width */
- cs->shift = 10;
- cs->mult = clocksource_hz2mult(p->rate, cs->shift);
-
pr_info("sh_tmu: %s used as clock source\n", cs->name);
clocksource_register(cs);
return 0;