2.6.32.28 update
/arch/x86/include/asm/processor.h
blob:13b1885fe276171e79c888db27b1b3688cf10e70 -> blob:78bb4d74292cec51b0b3f1c8a45da531f0cb56ad
--- arch/x86/include/asm/processor.h
+++ arch/x86/include/asm/processor.h
@@ -765,29 +765,6 @@ extern unsigned long boot_option_idle_o
extern unsigned long idle_halt;
extern unsigned long idle_nomwait;
-/*
- * on systems with caches, caches must be flashed as the absolute
- * last instruction before going into a suspended halt. Otherwise,
- * dirty data can linger in the cache and become stale on resume,
- * leading to strange errors.
- *
- * perform a variety of operations to guarantee that the compiler
- * will not reorder instructions. wbinvd itself is serializing
- * so the processor will not reorder.
- *
- * Systems without cache can just go into halt.
- */
-static inline void wbinvd_halt(void)
-{
- mb();
- /* check for clflush to determine if wbinvd is legal */
- if (cpu_has_clflush)
- asm volatile("cli; wbinvd; 1: hlt; jmp 1b" : : : "memory");
- else
- while (1)
- halt();
-}
-
extern void enable_sep_cpu(void);
extern int sysenter_setup(void);