Patch 2.6.32.33 to 2.6.32.35
/drivers/net/wireless/ath/ath9k/hw.c
blob:2570b72a7d5689f9040816ac7986a28e346904ad -> blob:2185f9771f3835626aa68671be2989f4d9539da4
--- drivers/net/wireless/ath/ath9k/hw.c
+++ drivers/net/wireless/ath/ath9k/hw.c
@@ -917,8 +917,6 @@ int ath9k_hw_init(struct ath_hw *ah)
ath9k_hw_init_defaults(ah);
ath9k_hw_init_config(ah);
- ath9k_hw_read_revisions(ah);
-
if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
DPRINTF(ah->ah_sc, ATH_DBG_FATAL, "Couldn't reset chip\n");
return -EIO;
@@ -931,8 +929,7 @@ int ath9k_hw_init(struct ath_hw *ah)
if (ah->config.serialize_regmode == SER_REG_MODE_AUTO) {
if (ah->hw_version.macVersion == AR_SREV_VERSION_5416_PCI ||
- ((AR_SREV_9160(ah) || AR_SREV_9280(ah)) &&
- !ah->is_pciexpress)) {
+ (AR_SREV_9280(ah) && !ah->is_pciexpress)) {
ah->config.serialize_regmode =
SER_REG_MODE_ON;
} else {
@@ -1760,6 +1757,8 @@ static bool ath9k_hw_set_reset_power_on(
return false;
}
+ ath9k_hw_read_revisions(ah);
+
return ath9k_hw_set_reset(ah, ATH9K_RESET_WARM);
}
@@ -2403,8 +2402,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;
/* For chips on which RTC reset is done, save TSF before it gets cleared */
- if (AR_SREV_9100(ah) ||
- (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)))
+ if (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
tsf = ath9k_hw_gettsf64(ah);
saveLedState = REG_READ(ah, AR_CFG_LED) &
@@ -2434,7 +2432,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
}
/* Restore TSF */
- if (tsf)
+ if (tsf && AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
ath9k_hw_settsf64(ah, tsf);
if (AR_SREV_9280_10_OR_LATER(ah))
@@ -2454,17 +2452,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st
if (r)
return r;
- /*
- * Some AR91xx SoC devices frequently fail to accept TSF writes
- * right after the chip reset. When that happens, write a new
- * value after the initvals have been applied, with an offset
- * based on measured time difference
- */
- if (AR_SREV_9100(ah) && (ath9k_hw_gettsf64(ah) < tsf)) {
- tsf += 1500;
- ath9k_hw_settsf64(ah, tsf);
- }
-
/* Setup MFP options for CCMP */
if (AR_SREV_9280_20_OR_LATER(ah)) {
/* Mask Retry(b11), PwrMgt(b12), MoreData(b13) to 0 in mgmt