--- arch/x86/kernel/hpet.c

+++ arch/x86/kernel/hpet.c

@@ -385,11 +385,28 @@ static int hpet_next_event(unsigned long

hpet_writel(cnt, HPET_Tn_CMP(timer));

/*

- * We need to read back the CMP register to make sure that

- * what we wrote hit the chip before we compare it to the

- * counter.

+ * We need to read back the CMP register on certain HPET

+ * implementations (ATI chipsets) which seem to delay the

+ * transfer of the compare register into the internal compare

+ * logic. With small deltas this might actually be too late as

+ * the counter could already be higher than the compare value

+ * at that point and we would wait for the next hpet interrupt

+ * forever. We found out that reading the CMP register back

+ * forces the transfer so we can rely on the comparison with

+ * the counter register below. If the read back from the

+ * compare register does not match the value we programmed

+ * then we might have a real hardware problem. We can not do

+ * much about it here, but at least alert the user/admin with

+ * a prominent warning.

+ * An erratum on some chipsets (ICH9,..), results in comparator read

+ * immediately following a write returning old value. Workaround

+ * for this is to read this value second time, when first

+ * read returns old value.

*/

- WARN_ON_ONCE((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt);

+ if (unlikely((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt)) {

+ WARN_ONCE((u32)hpet_readl(HPET_Tn_CMP(timer)) != cnt,

+ KERN_WARNING "hpet: compare register read back failed.\n");

+ }

return (s32)((u32)hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;

}

@@ -932,7 +949,7 @@ fs_initcall(hpet_late_init);

void hpet_disable(void)

{

- if (is_hpet_capable()) {

+ if (is_hpet_capable() && hpet_virt_address) {

unsigned long cfg = hpet_readl(HPET_CFG);

if (hpet_legacy_int_enabled) {