--- arch/arm/Kconfig

+++ arch/arm/Kconfig

@@ -890,6 +890,18 @@ config ARM_ERRATA_460075

ACTLR register. Note that setting specific bits in the ACTLR register

may not be available in non-secure mode.

+config ARM_ERRATA_720789

+ bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"

+ depends on CPU_V7 && SMP

+ help

+ This option enables the workaround for the 720789 Cortex-A9 (prior to

+ r2p0) erratum. A faulty ASID can be sent to the other CPUs for the

+ broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.

+ As a consequence of this erratum, some TLB entries which should be

+ invalidated are not, resulting in an incoherency in the system page

+ tables. The workaround changes the TLB flushing routines to invalidate

+ entries regardless of the ASID.

+

endmenu

source "arch/arm/common/Kconfig"