Initial OC/UV/OV

file:359a156d831d5adb54aa0ab6457c8db86b55608a -> file:4979cdca4f82fef79e06fc2b2977132acfbb3ab1
--- a/arch/arm/mach-msm/acpuclock-8064.c
+++ b/arch/arm/mach-msm/acpuclock-8064.c
@@ -47,7 +47,7 @@ static struct scalable scalable[] __init
.aux_clk_sel = 3,
.sec_clk_sel = 2,
.l2cpmr_iaddr = 0x4501,
- .vreg[VREG_CORE] = { "krait0", 1300000 },
+ .vreg[VREG_CORE] = { "krait0", 1450000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
.vreg[VREG_DIG] = { "krait0_dig", 1150000 },
.vreg[VREG_HFPLL_A] = { "krait0_hfpll", 1800000 },
@@ -58,7 +58,7 @@ static struct scalable scalable[] __init
.aux_clk_sel = 3,
.sec_clk_sel = 2,
.l2cpmr_iaddr = 0x5501,
- .vreg[VREG_CORE] = { "krait1", 1300000 },
+ .vreg[VREG_CORE] = { "krait1", 1450000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
.vreg[VREG_DIG] = { "krait1_dig", 1150000 },
.vreg[VREG_HFPLL_A] = { "krait1_hfpll", 1800000 },
@@ -69,7 +69,7 @@ static struct scalable scalable[] __init
.aux_clk_sel = 3,
.sec_clk_sel = 2,
.l2cpmr_iaddr = 0x6501,
- .vreg[VREG_CORE] = { "krait2", 1300000 },
+ .vreg[VREG_CORE] = { "krait2", 1450000 },
.vreg[VREG_MEM] = { "krait2_mem", 1150000 },
.vreg[VREG_DIG] = { "krait2_dig", 1150000 },
.vreg[VREG_HFPLL_A] = { "krait2_hfpll", 1800000 },
@@ -80,7 +80,7 @@ static struct scalable scalable[] __init
.aux_clk_sel = 3,
.sec_clk_sel = 2,
.l2cpmr_iaddr = 0x7501,
- .vreg[VREG_CORE] = { "krait3", 1300000 },
+ .vreg[VREG_CORE] = { "krait3", 1450000 },
.vreg[VREG_MEM] = { "krait3_mem", 1150000 },
.vreg[VREG_DIG] = { "krait3_dig", 1150000 },
.vreg[VREG_HFPLL_A] = { "krait3_hfpll", 1800000 },
@@ -116,22 +116,23 @@ static struct msm_bus_scale_pdata bus_sc
};
static struct l2_level l2_freq_tbl[] __initdata = {
- [0] = { { 384000, PLL_8, 0, 0x00 }, 950000, 1050000, 1 },
- [1] = { { 432000, HFPLL, 2, 0x20 }, 1050000, 1050000, 2 },
- [2] = { { 486000, HFPLL, 2, 0x24 }, 1050000, 1050000, 2 },
- [3] = { { 540000, HFPLL, 2, 0x28 }, 1050000, 1050000, 2 },
- [4] = { { 594000, HFPLL, 1, 0x16 }, 1050000, 1050000, 2 },
- [5] = { { 648000, HFPLL, 1, 0x18 }, 1050000, 1050000, 4 },
- [6] = { { 702000, HFPLL, 1, 0x1A }, 1150000, 1150000, 4 },
- [7] = { { 756000, HFPLL, 1, 0x1C }, 1150000, 1150000, 4 },
- [8] = { { 810000, HFPLL, 1, 0x1E }, 1150000, 1150000, 4 },
- [9] = { { 864000, HFPLL, 1, 0x20 }, 1150000, 1150000, 4 },
- [10] = { { 918000, HFPLL, 1, 0x22 }, 1150000, 1150000, 5 },
- [11] = { { 972000, HFPLL, 1, 0x24 }, 1150000, 1150000, 5 },
- [12] = { { 1026000, HFPLL, 1, 0x26 }, 1150000, 1150000, 5 },
- [13] = { { 1080000, HFPLL, 1, 0x28 }, 1150000, 1150000, 5 },
- [14] = { { 1134000, HFPLL, 1, 0x2A }, 1150000, 1150000, 5 },
- [15] = { { 1188000, HFPLL, 1, 0x2C }, 1150000, 1150000, 5 },
+ [0] = { { 378000, HFPLL, 2, 0x1C }, 950000, 1050000, 1 },
+ [1] = { { 384000, PLL_8, 0, 0x00 }, 950000, 1050000, 1 },
+ [2] = { { 432000, HFPLL, 2, 0x20 }, 1050000, 1050000, 2 },
+ [3] = { { 486000, HFPLL, 2, 0x24 }, 1050000, 1050000, 2 },
+ [4] = { { 540000, HFPLL, 2, 0x28 }, 1050000, 1050000, 2 },
+ [5] = { { 594000, HFPLL, 1, 0x16 }, 1050000, 1050000, 2 },
+ [6] = { { 648000, HFPLL, 1, 0x18 }, 1050000, 1050000, 4 },
+ [7] = { { 702000, HFPLL, 1, 0x1A }, 1050000, 1050000, 4 },
+ [8] = { { 756000, HFPLL, 1, 0x1C }, 1150000, 1150000, 4 },
+ [9] = { { 810000, HFPLL, 1, 0x1E }, 1150000, 1150000, 4 },
+ [10] = { { 864000, HFPLL, 1, 0x20 }, 1150000, 1150000, 4 },
+ [11] = { { 918000, HFPLL, 1, 0x22 }, 1150000, 1150000, 5 },
+ [12] = { { 972000, HFPLL, 1, 0x24 }, 1150000, 1150000, 5 },
+ [13] = { { 1026000, HFPLL, 1, 0x26 }, 1150000, 1150000, 5 },
+ [14] = { { 1080000, HFPLL, 1, 0x28 }, 1150000, 1150000, 5 },
+ [15] = { { 1134000, HFPLL, 1, 0x2A }, 1150000, 1150000, 5 },
+ [16] = { { 1188000, HFPLL, 1, 0x2C }, 1150000, 1150000, 5 },
{ }
};
@@ -477,6 +478,34 @@ static struct acpu_level tbl_PVS6_1700MH
{ 0, { 0 } }
};
+static struct acpu_level tbl_ziggy[] __initdata = {
+ { 1, { 162000, HFPLL, 2, 0x0C }, L2(0), 850000 },
+ { 1, { 216000, HFPLL, 2, 0x10 }, L2(0), 850000 },
+ { 1, { 270000, HFPLL, 2, 0x14 }, L2(0), 850000 },
+ { 1, { 324000, HFPLL, 2, 0x18 }, L2(0), 875000 },
+ { 1, { 378000, HFPLL, 2, 0x1C }, L2(0), 875000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(1), 900000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 900000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 900000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 900000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 912500 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 925000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 950000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 975000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 987500 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1012500 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1050000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1075000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1112500 },
+ { 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1162500 },
+ { 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1212500 },
+ { 1, { 1944000, HFPLL, 1, 0x48 }, L2(15), 1237500 },
+ { 1, { 1998000, HFPLL, 1, 0x4A }, L2(15), 1262500 },
+ { 1, { 2052000, HFPLL, 1, 0x4C }, L2(15), 1287500 },
+ { 1, { 2106000, HFPLL, 1, 0x4E }, L2(15), 1312500 },
+ { 0, { 0 } }
+};
+
static struct acpu_level tbl_PVS0_2000MHz[] __initdata = {
{ 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000 },
{ 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 950000 },
@@ -632,6 +661,8 @@ static struct pvs_table pvs_tables[NUM_S
[2][5] = { tbl_PVS5_2000MHz, sizeof(tbl_PVS5_2000MHz), 25000 },
[2][6] = { tbl_PVS6_2000MHz, sizeof(tbl_PVS6_2000MHz), 25000 },
+ [7][1] = { tbl_ziggy, sizeof(tbl_ziggy), 25000 },
+
[14][0] = { tbl_PVS0_1512MHz, sizeof(tbl_PVS0_1512MHz), 0 },
[14][1] = { tbl_PVS1_1512MHz, sizeof(tbl_PVS1_1512MHz), 25000 },
[14][2] = { tbl_PVS2_1512MHz, sizeof(tbl_PVS2_1512MHz), 25000 },
file:f13cf98d10cce44d26f660a33696b5d71191ba75 -> file:e68366c1835e916af9d8a9a224bbcddd08ec6baf
--- a/arch/arm/mach-msm/acpuclock-krait.c
+++ b/arch/arm/mach-msm/acpuclock-krait.c
@@ -985,7 +985,7 @@ void acpuclk_set_vdd(unsigned int khz, i
#endif /* CONFIG_CPU_VOTALGE_TABLE */
#ifdef CONFIG_CPU_FREQ_MSM
-static struct cpufreq_frequency_table freq_table[NR_CPUS][35];
+static struct cpufreq_frequency_table freq_table[NR_CPUS][46];
extern int console_batt_stat;
static void __init cpufreq_table_init(void)
{
@@ -1162,7 +1162,7 @@ static struct pvs_table * __init select_
speed_bin = bin_idx;
pvs_bin = tbl_idx;
#endif
- return &pvs_tables[bin_idx][tbl_idx];
+ return &pvs_tables[7][1];
}
static void __init drv_data_init(struct device *dev,
file:d764cc233d87b3b1605cdc227126465164b4fe2d -> file:951a80c96b91946d2afd7b4fea22ee2b77190faf
--- a/arch/arm/mach-msm/board-8064-regulator.c
+++ b/arch/arm/mach-msm/board-8064-regulator.c
@@ -721,15 +721,15 @@ mpq8064_gpio_regulator_pdata[] __devinit
/* SAW regulator constraints */
struct regulator_init_data msm8064_saw_regulator_pdata_8921_s5 =
/* ID vreg_name min_uV max_uV */
- SAW_VREG_INIT(S5, "8921_s5", 850000, 1300000);
+ SAW_VREG_INIT(S5, "8921_s5", 600000, 1450000);
struct regulator_init_data msm8064_saw_regulator_pdata_8921_s6 =
- SAW_VREG_INIT(S6, "8921_s6", 850000, 1300000);
+ SAW_VREG_INIT(S6, "8921_s6", 600000, 1450000);
struct regulator_init_data msm8064_saw_regulator_pdata_8821_s0 =
/* ID vreg_name min_uV max_uV */
- SAW_VREG_INIT(8821_S0, "8821_s0", 850000, 1300000);
+ SAW_VREG_INIT(8821_S0, "8821_s0", 600000, 1450000);
struct regulator_init_data msm8064_saw_regulator_pdata_8821_s1 =
- SAW_VREG_INIT(8821_S1, "8821_s1", 850000, 1300000);
+ SAW_VREG_INIT(8821_S1, "8821_s1", 600000, 1450000);
/* PM8921 regulator constraints */
struct pm8xxx_regulator_platform_data
file:cac88b2dcd707782b1cd2686e66affa7f9dff8eb -> file:5e43dec4d11c67fef214c8fea180a472523de378
--- a/arch/arm/mach-msm/board-jf_att.c
+++ b/arch/arm/mach-msm/board-jf_att.c
@@ -3223,9 +3223,9 @@ static struct platform_device msm_tsens_
};
static struct msm_thermal_data msm_thermal_pdata = {
- .sensor_id = 7,
+ .sensor_id = 0,
.poll_ms = 250,
- .limit_temp_degC = 60,
+ .limit_temp_degC = 75,
.temp_hysteresis_degC = 10,
.freq_step = 2,
};
file:118d67c97f12668fdc5dbab6269c5e4a3b01124f -> file:202c7b51e3537f268698d75747c11736cfb2e111
--- a/arch/arm/mach-msm/board-jf_cri.c
+++ b/arch/arm/mach-msm/board-jf_cri.c
@@ -204,7 +204,6 @@ static void sensor_power_on_vdd(int, int
#define PCIE_PWR_EN_PMIC_GPIO 13
#define PCIE_RST_N_PMIC_MPP 1
-
static int sec_tsp_synaptics_mode;
static int lcd_tsp_panel_version;
@@ -369,7 +368,6 @@ static struct i2c_board_info max77693_i2
};
#endif
-
#if defined(CONFIG_IR_REMOCON_FPGA)
static void irda_wake_en(bool onoff)
{
@@ -1424,7 +1422,7 @@ static void mhl_gpio_config(int data)
pr_err("mhl_vsil gpio_request is failed\n");
return;
}
- gpio_tlmm_config(GPIO_CFG(GPIO_MHL_INT, 0, GPIO_CFG_INPUT,
+ gpio_tlmm_config(GPIO_CFG(GPIO_MHL_INT, 0, GPIO_CFG_INPUT,
GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), 1);
} else
gpio_free(GPIO_MHL_INT);
@@ -1482,7 +1480,7 @@ static void sii8240_hw_onoff(bool onoff)
if (IS_ERR(mhl_l32))
return ;
rc = regulator_set_voltage(mhl_l32,
- 3300000, 3300000);
+ 3300000, 3300000);
}
rc = regulator_enable(mhl_l32);
if (rc)
@@ -1517,11 +1515,12 @@ static void sii8240_hw_onoff(bool onoff)
}
usleep_range(10000, 20000);
+
if (system_rev >= 6)
ice_gpiox_set(FPGA_GPIO_MHL_RST, 0);
if (system_rev < 6)
gpio_direction_output(GPIO_MHL_RST, 0);
- if (system_rev >= 4 && system_rev < 6)
+ if (system_rev >= 4 && system_rev < 6)
pm8xxx_gpio_config(GPIO_MHL_VSIL, &pmic_mhl_en_parm);
}
@@ -1548,10 +1547,12 @@ static void sii8240_hw_reset(void)
if (gpio_direction_output(GPIO_MHL_RST, 1))
pr_err("%s error in making GPIO_MHL_RST HIGH\n",
__func__);
+
usleep_range(5000, 20000);
if (gpio_direction_output(GPIO_MHL_RST, 0))
pr_err("%s error in making GPIO_MHL_RST Low\n",
__func__);
+
usleep_range(10000, 20000);
if (gpio_direction_output(GPIO_MHL_RST, 1))
pr_err("%s error in making GPIO_MHL_RST HIGH\n",
@@ -2255,6 +2256,7 @@ static int ice4_clock_en(int onoff)
}
return 0;
}
+
static void barcode_emul_poweron(int onoff)
{
int ret;
@@ -3134,9 +3136,9 @@ static struct platform_device msm_tsens_
};
static struct msm_thermal_data msm_thermal_pdata = {
- .sensor_id = 7,
+ .sensor_id = 0,
.poll_ms = 250,
- .limit_temp_degC = 60,
+ .limit_temp_degC = 75,
.temp_hysteresis_degC = 10,
.freq_step = 2,
};
file:bccf47f75359cc93ab694388b2a7bf6b1585d2c5 -> file:4a2b5016dd53517c020bfc3411a7735faaef44b8
--- a/arch/arm/mach-msm/board-jf_eur.c
+++ b/arch/arm/mach-msm/board-jf_eur.c
@@ -3176,9 +3176,9 @@ static struct platform_device msm_tsens_
};
static struct msm_thermal_data msm_thermal_pdata = {
- .sensor_id = 7,
+ .sensor_id = 0,
.poll_ms = 250,
- .limit_temp_degC = 60,
+ .limit_temp_degC = 75,
.temp_hysteresis_degC = 10,
.freq_step = 2,
};
file:a7f62d55930b12b1d805f6f5eeeb6e7e4764f1dc -> file:8bc46954ee580c2981676cade3246b1950acd8fe
--- a/arch/arm/mach-msm/board-jf_spr.c
+++ b/arch/arm/mach-msm/board-jf_spr.c
@@ -3137,9 +3137,9 @@ static struct platform_device msm_tsens_
};
static struct msm_thermal_data msm_thermal_pdata = {
- .sensor_id = 7,
+ .sensor_id = 0,
.poll_ms = 250,
- .limit_temp_degC = 60,
+ .limit_temp_degC = 75,
.temp_hysteresis_degC = 10,
.freq_step = 2,
};
file:084041fd493cb5ff0331c7748f6d36579a934e27 -> file:13b7a94e5008d5995b4b61f0d138e60c1e296126
--- a/arch/arm/mach-msm/board-jf_tmo.c
+++ b/arch/arm/mach-msm/board-jf_tmo.c
@@ -3142,9 +3142,9 @@ static struct platform_device msm_tsens_
};
static struct msm_thermal_data msm_thermal_pdata = {
- .sensor_id = 7,
+ .sensor_id = 0,
.poll_ms = 250,
- .limit_temp_degC = 60,
+ .limit_temp_degC = 75,
.temp_hysteresis_degC = 10,
.freq_step = 2,
};
file:c96933f357d8b7adadd16e01ec224ff5a0ea94eb -> file:adbe371ce0e667b3ae1487a34e8f7b84622d348d
--- a/arch/arm/mach-msm/board-jf_usc.c
+++ b/arch/arm/mach-msm/board-jf_usc.c
@@ -204,7 +204,6 @@ static void sensor_power_on_vdd(int, int
#define PCIE_PWR_EN_PMIC_GPIO 13
#define PCIE_RST_N_PMIC_MPP 1
-
static int sec_tsp_synaptics_mode;
static int lcd_tsp_panel_version;
@@ -369,7 +368,6 @@ static struct i2c_board_info max77693_i2
};
#endif
-
#if defined(CONFIG_IR_REMOCON_FPGA)
static void irda_wake_en(bool onoff)
{
@@ -1482,7 +1480,7 @@ static void sii8240_hw_onoff(bool onoff)
if (IS_ERR(mhl_l32))
return ;
rc = regulator_set_voltage(mhl_l32,
- 3300000, 3300000);
+ 3300000, 3300000);
}
rc = regulator_enable(mhl_l32);
if (rc)
@@ -1517,11 +1515,12 @@ static void sii8240_hw_onoff(bool onoff)
}
usleep_range(10000, 20000);
+
if (system_rev >= 6)
ice_gpiox_set(FPGA_GPIO_MHL_RST, 0);
if (system_rev < 6)
gpio_direction_output(GPIO_MHL_RST, 0);
- if (system_rev >= 4 && system_rev < 6)
+ if (system_rev >= 4 && system_rev < 6)
pm8xxx_gpio_config(GPIO_MHL_VSIL, &pmic_mhl_en_parm);
}
@@ -1548,10 +1547,12 @@ static void sii8240_hw_reset(void)
if (gpio_direction_output(GPIO_MHL_RST, 1))
pr_err("%s error in making GPIO_MHL_RST HIGH\n",
__func__);
+
usleep_range(5000, 20000);
if (gpio_direction_output(GPIO_MHL_RST, 0))
pr_err("%s error in making GPIO_MHL_RST Low\n",
__func__);
+
usleep_range(10000, 20000);
if (gpio_direction_output(GPIO_MHL_RST, 1))
pr_err("%s error in making GPIO_MHL_RST HIGH\n",
@@ -2257,6 +2258,7 @@ static int ice4_clock_en(int onoff)
}
return 0;
}
+
static void barcode_emul_poweron(int onoff)
{
int ret;
@@ -3136,9 +3138,9 @@ static struct platform_device msm_tsens_
};
static struct msm_thermal_data msm_thermal_pdata = {
- .sensor_id = 7,
+ .sensor_id = 0,
.poll_ms = 250,
- .limit_temp_degC = 60,
+ .limit_temp_degC = 75,
.temp_hysteresis_degC = 10,
.freq_step = 2,
};
file:1e33c17d2326808f0712855c7a15df6d1f366df0 -> file:55565cf08a6365c3e181b2760840e477e5e0e22e
--- a/arch/arm/mach-msm/board-jf_vzw.c
+++ b/arch/arm/mach-msm/board-jf_vzw.c
@@ -3138,9 +3138,9 @@ static struct platform_device msm_tsens_
};
static struct msm_thermal_data msm_thermal_pdata = {
- .sensor_id = 7,
+ .sensor_id = 0,
.poll_ms = 250,
- .limit_temp_degC = 60,
+ .limit_temp_degC = 75,
.temp_hysteresis_degC = 10,
.freq_step = 2,
};
@@ -5130,7 +5130,7 @@ static void __init apq8064_common_init(v
machine_is_mpq8064_dtv()))
platform_add_devices(common_not_mpq_devices,
ARRAY_SIZE(common_not_mpq_devices));
-
+
#ifdef CONFIG_KEYBOARD_CYPRESS_TOUCH_236
if (system_rev < 10)
platform_device_register(&touchkey_i2c_gpio_device);
file:9e0be6395978366978ae1171a41a8de29212271d -> file:91e639e473073ee830c39dc18a393ebc35dc5e9c
--- a/arch/arm/mach-msm/msm_dcvs.c
+++ b/arch/arm/mach-msm/msm_dcvs.c
@@ -146,7 +146,7 @@ static struct dcvs_core core_list[CORES_
static struct kobject *cores_kobj;
-#define DCVS_MAX_NUM_FREQS 15
+#define DCVS_MAX_NUM_FREQS 24
static struct msm_dcvs_freq_entry cpu_freq_tbl[DCVS_MAX_NUM_FREQS];
static unsigned num_cpu_freqs;
static struct msm_dcvs_platform_data *dcvs_pdata;