CLOCKS: support 600MHz FSB and 1.728GHz L2 Cache

file:d0b2bd53c0a0f74eeb8b6f79971aafeb8cf7b1c7 -> file:c9a50b42f04e7f8215be93231211eb48c5342033
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -397,6 +397,7 @@ static struct msm_bus_paths bw_level_tbl
[7] = BW_MBPS(4264), /* At least 533 MHz on bus. */
[8] = BW_MBPS(4532), /* At least 566 MHz on bus. */
[9] = BW_MBPS(4624), /* At least 578 MHz on bus. */
+ [10] = BW_MBPS(4800), /* At least 600 MHz on bus. */
};
static struct msm_bus_scale_pdata bus_client_pdata = {
@@ -482,10 +483,10 @@ static struct l2_level l2_freq_tbl_8960_
[17] = { { 1242000, HFPLL, 1, 0, 0x2E }, 1150000, 1150000, 7 }, //533mhz fsb
[18] = { { 1296000, HFPLL, 1, 0, 0x30 }, 1150000, 1150000, 7 }, //533mhz fsb
[19] = { { 1350000, HFPLL, 1, 0, 0x31 }, 1150000, 1150000, 7 }, //533mhz fsb
- [20] = { { 1458000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 7 }, //533mhz fsb
+ [20] = { { 1458000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 8 }, //533mhz fsb
[21] = { { 1512000, HFPLL, 1, 0, 0x33 }, 1150000, 1150000, 8 }, //566mhz fsb
- [22] = { { 1674000, HFPLL, 1, 0, 0x34 }, 1150000, 1150000, 8 }, //566mhz fsb
-
+ [22] = { { 1674000, HFPLL, 1, 0, 0x34 }, 1150000, 1150000, 9 }, //578mhz fsb
+ [23] = { { 1728000, HFPLL, 1, 0, 0x35 }, 1150000, 1150000, 10 }, //600mhz fsb
};
static struct acpu_level acpu_freq_tbl_8960_kraitv2_slow[] = {
@@ -513,9 +514,9 @@ static struct acpu_level acpu_freq_tbl_8
{ 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(20), 1237500 },
{ 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1250000 },
{ 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1250000 },
- { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(22), 1262500 },
- { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(22), 1262500 },
- { 1, { 1890000, HFPLL, 1, 0, 0x40 }, L2(22), 1300000 },
+ { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1262500 },
+ { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(23), 1262500 },
+ { 1, { 1890000, HFPLL, 1, 0, 0x40 }, L2(23), 1300000 },
{ 0, { 0 } }
};
@@ -544,9 +545,9 @@ static struct acpu_level acpu_freq_tbl_8
{ 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(20), 1187500 },
{ 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1200000 },
{ 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1200000 },
- { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(22), 1250000 },
- { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(22), 1275000 },
- { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(22), 1300000 },
+ { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1250000 },
+ { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(23), 1275000 },
+ { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(23), 1300000 },
{ 0, { 0 } }
};
@@ -575,9 +576,9 @@ static struct acpu_level acpu_freq_tbl_8
{ 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(20), 1137500 },
{ 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1150000 },
{ 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1175000 },
- { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(22), 1200000 },
- { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(22), 1250000 },
- { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(22), 1300000 },
+ { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1200000 },
+ { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(23), 1250000 },
+ { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(23), 1300000 },
{ 0, { 0 } }
};
@@ -606,9 +607,9 @@ static struct acpu_level acpu_freq_tbl_8
{ 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(20), 1112500 },
{ 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1125000 },
{ 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1175000 },
- { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(22), 1200000 },
- { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(22), 1250000 },
- { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(22), 1300000 },
+ { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1200000 },
+ { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(23), 1250000 },
+ { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(23), 1300000 },
{ 0, { 0 } }
};