Implement retention sleep mode
/arch/arm/mach-msm/board-8960.c
blob:21a28c211640d592e3802ff88f0ba01cda627694 -> blob:fa358640e32eca14f7d038b85d4f37604661766c
--- arch/arm/mach-msm/board-8960.c
+++ arch/arm/mach-msm/board-8960.c
@@ -1485,24 +1485,52 @@ static struct platform_device android_us
};
static uint8_t spm_wfi_cmd_sequence[] __initdata = {
- 0x03, 0x0f,
+ 0x03, 0x0f,
+};
+
+static uint8_t spm_retention_cmd_sequence[] __initdata = {
+ 0x00, 0x05, 0x03, 0x0D,
+ 0x0B, 0x00, 0x0f,
};
static uint8_t spm_power_collapse_without_rpm[] __initdata = {
- 0x00, 0x24, 0x54, 0x10,
- 0x09, 0x03, 0x01,
- 0x10, 0x54, 0x30, 0x0C,
- 0x24, 0x30, 0x0f,
+ 0x00, 0x24, 0x54, 0x10,
+ 0x09, 0x03, 0x01,
+ 0x10, 0x54, 0x30, 0x0C,
+ 0x24, 0x30, 0x0f,
};
static uint8_t spm_power_collapse_with_rpm[] __initdata = {
- 0x00, 0x24, 0x54, 0x10,
- 0x09, 0x07, 0x01, 0x0B,
- 0x10, 0x54, 0x30, 0x0C,
- 0x24, 0x30, 0x0f,
+ 0x00, 0x24, 0x54, 0x10,
+ 0x09, 0x07, 0x01, 0x0B,
+ 0x10, 0x54, 0x30, 0x0C,
+ 0x24, 0x30, 0x0f,
+};
+
+static struct msm_spm_seq_entry msm_spm_boot_cpu_seq_list[] __initdata = {
+ [0] = {
+ .mode = MSM_SPM_MODE_CLOCK_GATING,
+ .notify_rpm = false,
+ .cmd = spm_wfi_cmd_sequence,
+ },
+ [1] = {
+ .mode = MSM_SPM_MODE_POWER_RETENTION,
+ .notify_rpm = false,
+ .cmd = spm_retention_cmd_sequence,
+ },
+ [2] = {
+ .mode = MSM_SPM_MODE_POWER_COLLAPSE,
+ .notify_rpm = false,
+ .cmd = spm_power_collapse_without_rpm,
+ },
+ [3] = {
+ .mode = MSM_SPM_MODE_POWER_COLLAPSE,
+ .notify_rpm = true,
+ .cmd = spm_power_collapse_with_rpm,
+ },
};
-static struct msm_spm_seq_entry msm_spm_seq_list[] __initdata = {
+static struct msm_spm_seq_entry msm_spm_nonboot_cpu_seq_list[] __initdata = {
[0] = {
.mode = MSM_SPM_MODE_CLOCK_GATING,
.notify_rpm = false,
@@ -1533,8 +1561,8 @@ static struct msm_spm_platform_data msm_
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
- .num_modes = ARRAY_SIZE(msm_spm_seq_list),
- .modes = msm_spm_seq_list,
+ .num_modes = ARRAY_SIZE(msm_spm_boot_cpu_seq_list),
+ .modes = msm_spm_boot_cpu_seq_list,
},
[1] = {
.reg_base_addr = MSM_SAW1_BASE,
@@ -1548,8 +1576,8 @@ static struct msm_spm_platform_data msm_
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_0] = 0x0060009C,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DATA_1] = 0x0000001C,
.vctl_timeout_us = 50,
- .num_modes = ARRAY_SIZE(msm_spm_seq_list),
- .modes = msm_spm_seq_list,
+ .num_modes = ARRAY_SIZE(msm_spm_nonboot_cpu_seq_list),
+ .modes = msm_spm_nonboot_cpu_seq_list,
},
};
@@ -2125,12 +2153,12 @@ static struct platform_device *common_de
&msm_slim_ctrl,
&msm_device_wcnss_wlan,
#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
- defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
+ defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
&qcrypto_device,
#endif
#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
- defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
+ defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
&qcedev_device,
#endif
#ifdef CONFIG_MSM_ROTATOR
@@ -2317,7 +2345,7 @@ static void __init msm8960_gfx_init(void
uint32_t soc_platform_version = socinfo_get_version();
if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1) {
struct kgsl_device_platform_data *kgsl_3d0_pdata =
- msm_kgsl_3d0.dev.platform_data;
+ msm_kgsl_3d0.dev.platform_data;
kgsl_3d0_pdata->pwrlevel[0].gpu_freq = 320000000;
kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 266667000;
}
@@ -2327,11 +2355,23 @@ static struct msm_cpuidle_state msm_csta
{0, 0, "C0", "WFI",
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
- {0, 1, "C2", "POWER_COLLAPSE",
+ {0, 1, "C1", "RETENTION",
+ MSM_PM_SLEEP_MODE_RETENTION},
+
+ {0, 2, "C2", "STANDALONE_POWER_COLLAPSE",
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
+
+ {0, 3, "C3", "POWER_COLLAPSE",
MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
{1, 0, "C0", "WFI",
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
+
+ {1, 1, "C1", "RETENTION",
+ MSM_PM_SLEEP_MODE_RETENTION},
+
+ {1, 2, "C2", "STANDALONE_POWER_COLLAPSE",
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
};
static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
@@ -2342,6 +2382,20 @@ static struct msm_pm_platform_data msm_p
.suspend_enabled = 0,
},
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ },
+
+ [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_RETENTION)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ },
+
[MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
.idle_supported = 1,
.suspend_supported = 1,
@@ -2356,6 +2410,20 @@ static struct msm_pm_platform_data msm_p
.suspend_enabled = 0,
},
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ },
+
+ [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_RETENTION)] = {
+ .idle_supported = 1,
+ .suspend_supported = 1,
+ .idle_enabled = 0,
+ .suspend_enabled = 0,
+ },
+
[MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
.idle_supported = 1,
.suspend_supported = 0,
@@ -2369,55 +2437,63 @@ static struct msm_rpmrs_level msm_rpmrs_
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
- 100, 650, 801, 200,
+ 1, 784, 180000, 100,
},
{
- MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
- MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
- false,
- 8500, 51, 1122000, 8500,
+ MSM_PM_SLEEP_MODE_RETENTION,
+ MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
+ true,
+ 415, 715, 340827, 475,
+ },
+
+ {
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
+ MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
+ true,
+ 1300, 228, 1200000, 2000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
- MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
+ MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
false,
- 9000, 51, 1130300, 9000,
+ 2000, 138, 1208400, 3200,
},
+
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, HSFS_OPEN, ACTIVE, RET_HIGH),
false,
- 10000, 51, 1130300, 10000,
+ 6000, 119, 1850300, 9000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
false,
- 12000, 14, 2205900, 12000,
+ 9200, 68, 2839200, 16400,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
false,
- 18000, 12, 2364250, 18000,
+ 10300, 63, 3128000, 18200,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
false,
- 23500, 10, 2667000, 23500,
+ 18000, 10, 4602600, 27000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
false,
- 29700, 5, 2867000, 30000,
+ 20000, 2, 5752000, 32000,
},
};
@@ -2709,7 +2785,7 @@ static void __init msm8960_cdp_init(void
msm_tsens_early_init(&msm_tsens_pdata);
BUG_ON(msm_rpm_init(&msm_rpm_data));
BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
- ARRAY_SIZE(msm_rpmrs_levels)));
+ ARRAY_SIZE(msm_rpmrs_levels)));
regulator_suppress_info_printing();
if (msm_xo_init())