CPU: enhanced CPU TOPOLOGY Drivers
/arch/arm/kernel/smp.c
blob:c32ce179eeaeb88a6dfac0e8ce6ecbe87b7af83c -> blob:f62ce5fb014a23fcdb85e9f0966bcfb759e1c421
--- arch/arm/kernel/smp.c
+++ arch/arm/kernel/smp.c
@@ -315,7 +315,6 @@ static inline int skip_secondary_calibra
#else
return -ENXIO;
#endif
-
}
/*
@@ -325,20 +324,28 @@ static inline int skip_secondary_calibra
asmlinkage void __cpuinit secondary_start_kernel(void)
{
struct mm_struct *mm = &init_mm;
- unsigned int cpu = smp_processor_id();
+ unsigned int cpu;
pr_debug("CPU%u: Booted secondary processor\n", cpu);
/*
+ * The identity mapping is uncached (strongly ordered), so
+ * switch away from it before attempting any exclusive accesses.
+ */
+ cpu_switch_mm(mm->pgd, mm);
+ enter_lazy_tlb(mm, current);
+ local_flush_tlb_all();
+
+ /*
* All kernel threads share the same mm context; grab a
* reference and switch to it.
*/
+ cpu = smp_processor_id();
atomic_inc(&mm->mm_count);
current->active_mm = mm;
cpumask_set_cpu(cpu, mm_cpumask(mm));
- cpu_switch_mm(mm->pgd, mm);
- enter_lazy_tlb(mm, current);
- local_flush_tlb_all();
+
+ printk("CPU%u: Booted secondary processor\n", cpu);
cpu_init();
preempt_disable();
@@ -349,9 +356,6 @@ asmlinkage void __cpuinit secondary_star
*/
platform_secondary_init(cpu);
- /*
- * Enable local interrupts.
- */
notify_cpu_starting(cpu);
if (skip_secondary_calibrate())
@@ -564,9 +568,9 @@ static void ipi_cpu_stop(unsigned int cp
raw_spin_lock(&stop_lock);
printk(KERN_CRIT "CPU%u: stopping\n", cpu);
dump_stack();
-#if CONFIG_SEC_DEBUG
+/*#if CONFIG_SEC_DEBUG
sec_debug_dump_stack();
-#endif
+#endif*/
raw_spin_unlock(&stop_lock);
}
@@ -672,7 +676,9 @@ void handle_IPI(int ipinr, struct pt_reg
break;
case IPI_CPU_BACKTRACE:
+ irq_enter();
ipi_cpu_backtrace(cpu, regs);
+ irq_exit();
break;
default: