--- arch/arm/mach-msm/acpuclock-8960.c
+++ arch/arm/mach-msm/acpuclock-8960.c
@@ -36,6 +36,9 @@
#include <mach/rpm-regulator.h>
#include "acpuclock.h"
+#if defined(CONFIG_SEC_DEBUG_DCVS_LOG) || defined(CONFIG_SEC_L1_DCACHE_PANIC_CHK)
+#include <mach/sec_debug.h>
+#endif
#include "pm.h"
/*
@@ -395,7 +398,6 @@ static struct msm_bus_paths bw_level_tbl
[8] = BW_MBPS(4532), /* At least 566 MHz on bus. */
[9] = BW_MBPS(4624), /* At least 578 MHz on bus. */
[10] = BW_MBPS(4800), /* At least 600 MHz on bus. */
- [11] = BW_MBPS(5336), /* At least 667 MHz on bus. */
};
static struct msm_bus_scale_pdata bus_client_pdata = {
@@ -462,8 +464,8 @@ static struct acpu_level acpu_freq_tbl_8
static struct l2_level l2_freq_tbl_8960_kraitv2[] = {
[0] = { {STBY_KHZ, QSB, 0, 0, 0x00 }, 1050000, 1050000, 0 },
- [1] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 }, //133mhz fsb
- [2] = { { 432000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 3 }, //266mhz fsb
+ [1] = { { 192000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 }, //133mhz fsb
+ [2] = { { 384000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 3 }, //266mhz fsb
[3] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 3 }, //266mhz fsb
[4] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 3 }, //266mhz fsb
[5] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 3 }, //266mhz fsb
@@ -481,10 +483,10 @@ static struct l2_level l2_freq_tbl_8960_
[17] = { { 1242000, HFPLL, 1, 0, 0x2E }, 1150000, 1150000, 7 }, //533mhz fsb
[18] = { { 1296000, HFPLL, 1, 0, 0x30 }, 1150000, 1150000, 7 }, //533mhz fsb
[19] = { { 1350000, HFPLL, 1, 0, 0x31 }, 1150000, 1150000, 7 }, //533mhz fsb
- [20] = { { 1458000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 8 }, //566mhz fsb
- [21] = { { 1512000, HFPLL, 1, 0, 0x33 }, 1150000, 1150000, 9 }, //578mhz fsb
- [22] = { { 1674000, HFPLL, 1, 0, 0x34 }, 1150000, 1150000, 10 }, //600mhz fsb
- [23] = { { 1728000, HFPLL, 1, 0, 0x35 }, 1150000, 1150000, 11 }, //6667mhz fsb
+ [20] = { { 1458000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 8 }, //533mhz fsb
+ [21] = { { 1512000, HFPLL, 1, 0, 0x33 }, 1150000, 1150000, 8 }, //566mhz fsb
+ [22] = { { 1674000, HFPLL, 1, 0, 0x34 }, 1150000, 1150000, 9 }, //578mhz fsb
+ [23] = { { 1728000, HFPLL, 1, 0, 0x35 }, 1150000, 1150000, 10 }, //600mhz fsb
};
static struct acpu_level acpu_freq_tbl_8960_kraitv2_slow[] = {
@@ -511,12 +513,10 @@ static struct acpu_level acpu_freq_tbl_8
{ 1, { 1404000, HFPLL, 1, 0, 0x34 }, L2(19), 1237500 },
{ 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(20), 1237500 },
{ 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1250000 },
- { 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1275000 },
+ { 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1250000 },
{ 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1262500 },
- { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(21), 1262500 },
- { 1, { 1890000, HFPLL, 1, 0, 0x40 }, L2(21), 1300000 },
- { 1, { 1998000, HFPLL, 1, 0, 0x42 }, L2(20), 1325000 },
- { 1, { 2106000, HFPLL, 1, 0, 0x44 }, L2(20), 1350000 },
+ { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(23), 1262500 },
+ { 1, { 1890000, HFPLL, 1, 0, 0x40 }, L2(23), 1300000 },
{ 0, { 0 } }
};
@@ -546,10 +546,8 @@ static struct acpu_level acpu_freq_tbl_8
{ 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1200000 },
{ 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1200000 },
{ 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1250000 },
- { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(21), 1275000 },
- { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(21), 1325000 },
- { 1, { 1998000, HFPLL, 1, 0, 0x42 }, L2(20), 1325000 },
- { 1, { 2106000, HFPLL, 1, 0, 0x44 }, L2(20), 1350000 },
+ { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(23), 1275000 },
+ { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(23), 1300000 },
{ 0, { 0 } }
};
@@ -579,10 +577,8 @@ static struct acpu_level acpu_freq_tbl_8
{ 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1150000 },
{ 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1175000 },
{ 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1200000 },
- { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(21), 1250000 },
- { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(21), 1300000 },
- { 1, { 1998000, HFPLL, 1, 0, 0x42 }, L2(20), 1325000 },
- { 1, { 2106000, HFPLL, 1, 0, 0x44 }, L2(20), 1350000 },
+ { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(23), 1250000 },
+ { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(23), 1300000 },
{ 0, { 0 } }
};
@@ -612,10 +608,8 @@ static struct acpu_level acpu_freq_tbl_8
{ 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1125000 },
{ 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1175000 },
{ 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1200000 },
- { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(21), 1250000 },
- { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(21), 1300000 },
- { 1, { 1998000, HFPLL, 1, 0, 0x42 }, L2(20), 1325000 },
- { 1, { 2106000, HFPLL, 1, 0, 0x44 }, L2(20), 1350000 },
+ { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(23), 1250000 },
+ { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(23), 1300000 },
{ 0, { 0 } }
};
@@ -1170,6 +1164,10 @@ static int acpuclk_8960_set_rate(int cpu
pr_debug("Switching from ACPU%d rate %u KHz -> %u KHz\n",
cpu, strt_acpu_s->khz, tgt_acpu_s->khz);
+#ifdef CONFIG_SEC_DEBUG_DCVS_LOG
+ sec_debug_dcvs_log(cpu, strt_acpu_s->khz, tgt_acpu_s->khz);
+#endif
+
/* Set the CPU speed. */
set_speed(&scalable[cpu], tgt_acpu_s, reason);
@@ -1312,7 +1310,7 @@ static void __init bus_init(unsigned int
}
#ifdef CONFIG_CPU_FREQ_MSM
-static struct cpufreq_frequency_table freq_table[NR_CPUS][FREQ_TABLE_SIZE];
+static struct cpufreq_frequency_table freq_table[NR_CPUS][34];
static void __init cpufreq_table_init(void)
{
@@ -1398,7 +1396,6 @@ static struct notifier_block __cpuinitda
.notifier_call = acpuclock_cpu_callback,
};
-#if 0
static const int krait_needs_vmin(void)
{
switch (read_cpuid_id()) {
@@ -1417,7 +1414,6 @@ static void kraitv2_apply_vmin(struct ac
if (tbl->vdd_core < MIN_VDD_SC)
tbl->vdd_core = MIN_VDD_SC;
}
-#endif
#ifdef CONFIG_SEC_L1_DCACHE_PANIC_CHK
uint32_t global_sec_pvs_value;
@@ -1516,19 +1512,13 @@ static struct acpu_level * __init select
} else {
BUG();
}
-#if 0
if (krait_needs_vmin())
kraitv2_apply_vmin(acpu_freq_tbl);
-#endif
/* Find the max supported scaling frequency. */
for (l = acpu_freq_tbl; l->speed.khz != 0; l++)
if (l->use_for_scaling)
- if (l->speed.khz <= MAX_FREQ_LIMIT)
- max_acpu_level = l;
- else
- l->use_for_scaling = 0;
-
+ max_acpu_level = l;
BUG_ON(!max_acpu_level);
pr_info("Max ACPU freq: %u KHz\n", max_acpu_level->speed.khz);
projects / ziggy471-sgs3-jb.git / blobdiff