Implement sysfs interface for vdd
/arch/arm/mach-msm/acpuclock-8960.c
blob:9104b9562b19d5035f2f41eb016f0ea27e06d113 -> blob:d295b518757183ac490b619058444a9f8c99bdc0
--- arch/arm/mach-msm/acpuclock-8960.c
+++ arch/arm/mach-msm/acpuclock-8960.c
@@ -40,6 +40,7 @@
#include <mach/sec_debug.h>
#endif
+
/*
* Source IDs.
* These must be negative to not overlap with the source IDs
@@ -72,6 +73,7 @@
#define HFPLL_NOMINAL_VDD 1050000
#define HFPLL_LOW_VDD 800000
+#define HFPLL_HIGH_VDD 1350000
#define HFPLL_LOW_VDD_PLL_L_MAX 0x28
#define SECCLKAGD BIT(4)
@@ -1692,3 +1694,33 @@ struct acpuclk_soc_data acpuclk_8960_soc
struct acpuclk_soc_data acpuclk_8930_soc_data __initdata = {
.init = acpuclk_8960_init,
};
+
+#ifdef CONFIG_VDD_USERSPACE
+ssize_t acpuclk_get_vdd_levels_str(char *buf)
+{
+ int i, len = 0;
+ if (buf) {
+ mutex_lock(&driver_lock);
+ len += sprintf(buf + len, "Min: %4d\n", HFPLL_LOW_VDD);
+ len += sprintf(buf + len, "Max: %4d\n", HFPLL_HIGH_VDD);
+ for (i = 0; acpu_freq_tbl[i].speed.khz; i++) {
+ len += sprintf(buf + len, "%8u: %4d\n", acpu_freq_tbl[i].speed.khz, acpu_freq_tbl[i].vdd_core);
+ }
+ mutex_unlock(&driver_lock);
+ }
+ return len;
+}
+
+void acpuclk_set_vdd(unsigned int khz, int vdd)
+{
+ int i;
+ mutex_lock(&driver_lock);
+ for (i = 0; acpu_freq_tbl[i].speed.khz; i++) {
+ if (khz == 0)
+ acpu_freq_tbl[i].vdd_core = min(max((unsigned int)(acpu_freq_tbl[i].vdd_core + vdd), (unsigned int)HFPLL_LOW_VDD), (unsigned int)HFPLL_HIGH_VDD);
+ else if (acpu_freq_tbl[i].speed.khz == khz)
+ acpu_freq_tbl[i].vdd_core = min(max((unsigned int)vdd, (unsigned int)HFPLL_LOW_VDD), (unsigned int)HFPLL_HIGH_VDD);
+ }
+ mutex_unlock(&driver_lock);
+}
+#endif