--- arch/x86/include/asm/msr-index.h

+++ arch/x86/include/asm/msr-index.h

@@ -81,11 +81,15 @@

#define MSR_IA32_MC0_ADDR 0x00000402

#define MSR_IA32_MC0_MISC 0x00000403

+#define MSR_AMD64_MC0_MASK 0xc0010044

+

#define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x))

#define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x))

#define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x))

#define MSR_IA32_MCx_MISC(x) (MSR_IA32_MC0_MISC + 4*(x))

+#define MSR_AMD64_MCx_MASK(x) (MSR_AMD64_MC0_MASK + (x))

+

/* These are consecutive and not in the normal 4er MCE bank block */

#define MSR_IA32_MC0_CTL2 0x00000280

#define MSR_IA32_MCx_CTL2(x) (MSR_IA32_MC0_CTL2 + (x))