--- a/arch/arm/mach-msm/msm_dcvs.c

+++ b/arch/arm/mach-msm/msm_dcvs.c

@@ -23,6 +23,7 @@

#include <linux/spinlock.h>

#include <linux/stringify.h>

#include <linux/debugfs.h>

+#include <linux/delay.h>

#include <asm/atomic.h>

#include <asm/page.h>

#include <mach/msm_dcvs.h>

@@ -500,6 +501,8 @@ int msm_dcvs_register_core(const char *c

int ret = -EINVAL;

struct dcvs_core *core = NULL;

+ if (strcmp(core_name, (char *)"cpu1") == 0) msleep(CONFIG_CPU_FREQ_MSM_DCVS_CPU1_DELAY);

+

if (!core_name || !core_name[0])

return ret;

--- a/drivers/cpufreq/Kconfig

+++ b/drivers/cpufreq/Kconfig

@@ -37,6 +37,15 @@ config CPU_FREQ_MIN_VDD_SC

depends on CPU_FREQ

default 850000

+config CPU_FREQ_MSM_DCVS_CPU1_DELAY

+ int "Delay prior to initializing dcvs for cpu1 (ms)"

+ depends on CPU_FREQ

+ default 1000

+ help

+ The MSM-DCVS governor sometimes does not register

+ the second cpu, cpu1, correctly. This delay gives

+ cpu1 additional time to become ready prior to registering

+

config CPU_FREQ_TABLE

tristate