--- 8774b648ac6fb3c35ce3d1e0b2f128ee85fc4fa8
+++ 33b17ca13115df90bda14320c27f14f80432ff0e
@@ -3242,9 +3242,10 @@ static struct clk_freq_tbl clk_tbl_gfx2d
 	F_GFX2D(128000000, pll8, 1,  3),
 	F_GFX2D(145455000, pll2, 2, 11),
 	F_GFX2D(160000000, pll2, 1,  5),
-	F_GFX2D(177778000, pll2, 2,  9),
-	F_GFX2D(200000000, pll2, 1,  4),
-	F_GFX2D(228571000, pll2, 2,  7),
+	F_GFX2D(228571000, pll2, 2,  9),
+	F_GFX2D(266667000, pll2, 1,  4),
+	F_GFX2D(300000000, pll2, 2,  7),
+	F_GFX2D(320000000, pll2, 1,  3),
 	F_END
 };
 
@@ -3286,8 +3287,8 @@ static struct rcg_clk gfx2d0_clk = {
 	.c = {
 		.dbg_name = "gfx2d0_clk",
 		.ops = &clk_ops_rcg_8960,
-		VDD_DIG_FMAX_MAP3(LOW,  100000000, NOMINAL, 200000000,
-				  HIGH, 228571000),
+		VDD_DIG_FMAX_MAP3(LOW,  100000000, NOMINAL, 266667000,
+				  HIGH, 320000000),
 		CLK_INIT(gfx2d0_clk.c),
 	},
 };
@@ -3330,8 +3331,8 @@ static struct rcg_clk gfx2d1_clk = {
 	.c = {
 		.dbg_name = "gfx2d1_clk",
 		.ops = &clk_ops_rcg_8960,
-		VDD_DIG_FMAX_MAP3(LOW,  100000000, NOMINAL, 200000000,
-				  HIGH, 228571000),
+		VDD_DIG_FMAX_MAP3(LOW,  100000000, NOMINAL, 266667000,
+				  HIGH, 320000000),
 		CLK_INIT(gfx2d1_clk.c),
 	},
 };
@@ -3359,9 +3360,11 @@ static struct clk_freq_tbl clk_tbl_gfx3d
 	F_GFX3D(160000000, pll2, 1,  5),
 	F_GFX3D(177778000, pll2, 2,  9),
 	F_GFX3D(200000000, pll2, 1,  4),
-	F_GFX3D(228571000, pll2, 2,  7),
-	F_GFX3D(266667000, pll2, 1,  3),
-	F_GFX3D(320000000, pll2, 2,  5),
+	F_GFX3D(266667000, pll2, 2,  7),
+	F_GFX3D(320000000, pll2, 1,  3),
+	F_GFX3D(400000000, pll2, 3,  8),
+	F_GFX3D(450000000, pll2, 1,  2),
+	F_GFX3D(512000000, pll2, 2,  5),
 	F_END
 };
 
@@ -3383,13 +3386,15 @@ static struct clk_freq_tbl clk_tbl_gfx3d
 	F_GFX3D(300000000, pll3, 1,  4),
 	F_GFX3D(320000000, pll2, 2,  5),
 	F_GFX3D(400000000, pll2, 1,  2),
+	F_GFX3D(480000000, pll3, 2,  5),
+	F_GFX3D(512000000, pll2, 1,  2),
 	F_END
 };
 
 static unsigned long fmax_gfx3d_8960_v2[MAX_VDD_LEVELS] __initdata = {
 	[VDD_DIG_LOW]     = 128000000,
-	[VDD_DIG_NOMINAL] = 300000000,
-	[VDD_DIG_HIGH]    = 400000000
+	[VDD_DIG_NOMINAL] = 320000000,
+	[VDD_DIG_HIGH]    = 512000000
 };
 
 static struct clk_freq_tbl clk_tbl_gfx3d_8064[] = {
@@ -3409,13 +3414,14 @@ static struct clk_freq_tbl clk_tbl_gfx3d
 	F_GFX3D(266667000, pll2,  1,  3),
 	F_GFX3D(325000000, pll15, 1,  3),
 	F_GFX3D(400000000, pll2,  1,  2),
+	F_GFX3D(512000000, pll2,  1,  2),
 	F_END
 };
 
 static unsigned long fmax_gfx3d_8064[MAX_VDD_LEVELS] __initdata = {
 	[VDD_DIG_LOW]     = 128000000,
 	[VDD_DIG_NOMINAL] = 325000000,
-	[VDD_DIG_HIGH]    = 400000000
+	[VDD_DIG_HIGH]    = 512000000
 };
 
 static struct bank_masks bmnd_info_gfx3d = {
@@ -3456,8 +3462,8 @@ static struct rcg_clk gfx3d_clk = {
 	.c = {
 		.dbg_name = "gfx3d_clk",
 		.ops = &clk_ops_rcg_8960,
-		VDD_DIG_FMAX_MAP3(LOW,  128000000, NOMINAL, 266667000,
-				  HIGH, 320000000),
+		VDD_DIG_FMAX_MAP3(LOW,  128000000, NOMINAL, 320000000,
+				  HIGH, 512000000),
 		CLK_INIT(gfx3d_clk.c),
 		.depends = &gmem_axi_clk.c,
 	},
@@ -4116,6 +4122,7 @@ static struct clk_freq_tbl clk_tbl_vpe[]
 	F_VPE( 96000000, pll8,  4),
 	F_VPE(100000000, pll2,  8),
 	F_VPE(160000000, pll2,  5),
+	F_VPE(200000000, pll2,  4),
 	F_END
 };
 
@@ -4139,7 +4146,7 @@ static struct rcg_clk vpe_clk = {
 	.c = {
 		.dbg_name = "vpe_clk",
 		.ops = &clk_ops_rcg_8960,
-		VDD_DIG_FMAX_MAP2(LOW, 76800000, NOMINAL, 160000000),
+		VDD_DIG_FMAX_MAP2(LOW, 76800000, NOMINAL, 200000000),
 		CLK_INIT(vpe_clk.c),
 		.depends = &vpe_axi_clk.c,
 	},