--- aaef68da7aaf53d8b02f24c52e27ee30701ac597
+++ 121ac55f1f0511a5c37bd1b3cc5faf372c7cbd9e
@@ -17,6 +17,8 @@ config CPU_FREQ
 
 if CPU_FREQ
 
+if 	ARCH_MSM
+
 config CPU_FREQ_MIN_SCALING_LIMIT
 	int "Min CPU Scaling Frequency Limit"
 	depends on CPU_FREQ
@@ -27,6 +29,11 @@ config CPU_FREQ_MAX_SCALING_LIMIT
 	depends on CPU_FREQ
 	default 1900000
 
+config MSM_VMIN
+	int "VMIN used for acpuclock"
+	default 900000
+	depends on CPU_FREQ
+
 config CPU_FREQ_MAX_VDD_SC
 	int "Max CPU VDD SC uV"
 	depends on CPU_FREQ
@@ -45,7 +52,9 @@ config CPU_FREQ_MSM_DCVS_CPU1_DELAY
 		The MSM-DCVS governor sometimes does not register
 		the second cpu, cpu1, correctly.  This delay gives
 		cpu1 additional time to become ready prior to registering
-		
+
+endif
+
 config CPU_FREQ_TABLE
 	tristate