--- arch/arm/mach-msm/acpuclock-8960.c

+++ arch/arm/mach-msm/acpuclock-8960.c

@@ -597,27 +597,25 @@ static struct acpu_level acpu_freq_tbl_8

static struct l2_level l2_freq_tbl_8960_kraitv2[] = {

[0] = { {STBY_KHZ, QSB, 0, 0, 0x00 }, 1050000, 1050000, 0 },

- [1] = { { 192000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 }, //133mhz fsb

- [2] = { { 384000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 3 }, //266mhz fsb

- [3] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 3 }, //266mhz fsb

- [4] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 3 }, //266mhz fsb

- [5] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 3 }, //266mhz fsb

- [6] = { { 648000, HFPLL, 1, 0, 0x18 }, 1050000, 1050000, 4 }, //400mhz fsb

- [7] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 4 }, //400mhz fsb

- [8] = { { 756000, HFPLL, 1, 0, 0x1C }, 1150000, 1150000, 4 }, //400mhz fsb

- [9] = { { 810000, HFPLL, 1, 0, 0x1E }, 1150000, 1150000, 4 }, //400mhz fsb

- [10] = { { 864000, HFPLL, 1, 0, 0x20 }, 1150000, 1150000, 4 }, //400mhz fsb

- [11] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 7 }, //533mhz fsb

- [12] = { { 972000, HFPLL, 1, 0, 0x24 }, 1150000, 1150000, 7 }, //533mhz fsb

- [13] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 7 }, //533mhz fsb

- [14] = { { 1080000, HFPLL, 1, 0, 0x28 }, 1150000, 1150000, 7 }, //533mhz fsb

- [15] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 7 }, //533mhz fsb

- [16] = { { 1188000, HFPLL, 1, 0, 0x2C }, 1150000, 1150000, 7 }, //533mhz fsb

- [17] = { { 1242000, HFPLL, 1, 0, 0x2E }, 1150000, 1150000, 7 }, //533mhz fsb

- [18] = { { 1296000, HFPLL, 1, 0, 0x30 }, 1150000, 1150000, 7 }, //533mhz fsb

- [19] = { { 1350000, HFPLL, 1, 0, 0x31 }, 1150000, 1150000, 7 }, //533mhz fsb

- [20] = { { 1458000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 7 }, //533mhz fsb

- [21] = { { 1512000, HFPLL, 1, 0, 0x33 }, 1150000, 1150000, 7 }, //533mhz fsb

+ [1] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 },

+ [2] = { { 432000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 2 },

+ [3] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 2 },

+ [4] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 2 },

+ [5] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 2 },

+ [6] = { { 648000, HFPLL, 1, 0, 0x18 }, 1050000, 1050000, 4 },

+ [7] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 4 },

+ [8] = { { 756000, HFPLL, 1, 0, 0x1C }, 1150000, 1150000, 4 },

+ [9] = { { 810000, HFPLL, 1, 0, 0x1E }, 1150000, 1150000, 4 },

+ [10] = { { 864000, HFPLL, 1, 0, 0x20 }, 1150000, 1150000, 4 },

+ [11] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 6 },

+ [12] = { { 972000, HFPLL, 1, 0, 0x24 }, 1150000, 1150000, 6 },

+ [13] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 6 },

+ [14] = { { 1080000, HFPLL, 1, 0, 0x28 }, 1150000, 1150000, 6 },

+ [15] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 6 },

+ [16] = { { 1188000, HFPLL, 1, 0, 0x2C }, 1150000, 1150000, 6 },

+ [17] = { { 1242000, HFPLL, 1, 0, 0x2E }, 1150000, 1150000, 6 },

+ [18] = { { 1296000, HFPLL, 1, 0, 0x30 }, 1150000, 1150000, 6 },

+ [19] = { { 1350000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 6 },

};

static struct acpu_level acpu_freq_tbl_8960_kraitv2_slow[] = {

@@ -1823,6 +1821,8 @@ ssize_t acpuclk_get_vdd_levels_str(char

int i, len = 0;

if (buf) {

mutex_lock(&driver_lock);

+ len += sprintf(buf + len, "Min: %4d\n", HFPLL_LOW_VDD);

+ len += sprintf(buf + len, "Max: %4d\n", HFPLL_HIGH_VDD);

for (i = 0; acpu_freq_tbl[i].speed.khz; i++) {

len += sprintf(buf + len, "%8u: %4d\n", acpu_freq_tbl[i].speed.khz, acpu_freq_tbl[i].vdd_core);

}